IC decryption request source

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IC decryption request source: that is, external interrupt 0 and 1, introduced through the external pin, there are two pins on the microcontroller, named INT0, INT1, namely P3.2, P3.3 these two pins. In the internal TCON, four bits are related to external interruption. IT0: INT0 trigger mode control bit, can be programmed and reset by software, IT0 = 0, INT0 for low level trigger mode, IT0 = 1, INT0 for negative jump trigger mode. The differences between the two methods will be discussed later. IE0:INT0 interrupt request flag bit. When there is an external interrupt request, this is set to 1 (which is done by the hardware), which clears IE0 by the hardware after the CPU responds to the interrupt. The use of IT1 and IE1 is the same as that of IT0 and IE0. (2) Internal interrupt request source TF0: Overflow interrupt flag of timer T0. When T0 count overflows, TF0 is set by hardware. When the CPU response is interrupted, the TF0 is cleared by the hardware 0. TF1: similar to TF0. TI, RI: serial port sending and receiving interruption, and then explained in serial port. In MCS-51 interrupt system, interrupt allowance register IE is controlled by 8-bit interrupt allowance register IE which can be bit-addressable in chip. Where EA is the master switch, if it is equal to 0, all interrupts are not allowed. The interruption of the e serial port allows the interrupt of the timer 1 1, allowing EX1 interrupt 1 interrupt. ET0 timer 0 interrupt allows EX0 – out interrupt 0 interrupt allowed. If we set the allowable external interrupt 1, timer 1 interrupt allowable, other not allowed, then IE can be EAX, that is, 8CH, of course, we can also use the bit operation instruction SETB EA SETB ET1SETB EX1 to achieve it. Natural Priority of Five Interrupt Sources and Outside Interrupt Service Entry Address 0:0003H Timer 0:000BH Outside Interrupt 1:0013H Timer 1:001BH Serial Port: 0023H Their Natural Priority Ranges from High to Low. Write here, you should understand why there are some programs before we start to write this way: ORG 0000HLJMP START ORG 0030H START:. The purpose of this is to make the vector address occupied by the interrupt source. Of course, when there is no interruption in the program, it is not wrong in principle to write the program directly from 0000H, but it is better not to do so in practice. Priority: SCM adopts the strategy of natural priority and manual setting of high and low priority, that is, programmers can set which interrupts are high priority and which interrupts are low priority, because there are only two levels, there must be some interrupts at the same level, at the same level, determined by natural priority. When starting, every interrupt is low priority, and we can set the priority with instructions. Look at Table 2 where the interrupt priority is set high by the interrupt priority register IP, and one bit in the IP is set to 1. The corresponding interrupt is high priority, otherwise it is low priority. XX X PS PT1 PX1 PT0 PX0

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