About unlock STM32L100xx, STM32L151xx, STM32L152xx, STM32L162xx
The system resets all registers except RTC, RTC backup register, and control/status register RCC_CSR.
The system reset is generated by:
- NRST pin is pulled lowEnd of watchdog count (WWDG reset)End of independent watchdog technology (IWDG reset)Software reset (SW reset)Low power management resetOption Byte Load ResetExit Standby mode
These reset sources can be acknowledged by looking at the corresponding reset flag bits in the RCC_CSR register.
Reset by setting the SYSRESETREQ bit in the Application Interrupt and Reset Control register of the Cortex-M3. We need to refer to the Cortex-M3 kernel-related information.
Low power management reset
The following two scenarios result in a low power management reset:
- Enter Standby mode:
This reset is enabled by resetting the nRST_STDBY bit in the User Option Byte. In this case, the device will enter the reset state instead of entering Standby mode when the sequence of entering Standby mode is executed at any time.
- Enter the Stop mode:
This reset is enabled by resetting the nRST_STOP bit in the user option byte. In this case, the device will enter the reset state instead of entering the Stop mode when the sequence of entering the Stop mode is executed at any time.